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Transactional Memory and Intel STM compiler - how does it work

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Transactional Memory and Intel STM compiler - how does it work


p>We are hearing from Intel once again as they are trying to push their STM compiler with their prototype unveiled in october 2007. We are hearing lots of buzz surrounding transactional memory from multiple sources. There are claims of immense speed improvements on multicore and multiprocessor systems, but are they all true?

Traditional Synchronization

In traditional world, synchronization for concurrently running threads is accomplished by exclusive access to memory region. A thread or process can request lock on an area and then update as much as needed without having another thread messing with it. This type of synchronization performs well on system with only one single core CPU. When dual core, or multicore CPU is introduced, or when several cpus are installed, synchronization becomes very complex with processor bus requesting execution breaks, atomic execution and interrupts. If large amount of memory is protected by single lock with multiple concurrent threads requesting access to same resource, only one can be allowed to run, even if they will not access same part of protected memory. This could lead to n-1 wait scenario where all but one cpu core is running. This technique is known as pessimistic lock as we assume there will be conflict and take action before hand.

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More info: Transactional Synchronization and how is it done

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The idea behind transactional synchronization is to use optimistic locking. The reason for being optimistic is that even write is considered atomic unless multiple areas of memory are modified in single step. From an implementation standpoint, when an equivalent of lock is entered, a new transaction is created. As with traditional transactional framework, if you could roll back the transaction, you can undo the damage that a failed attempt would otherwise cause. In step by step it goes something like this:

First you acquire transaction. Then you ask for memory write. The transactional memory backend will record the values that were present at the time you attempted an access, it will also record values that you attempted to write. As you perform your write, all of the changes are recorded. Upon commit of transaction - an equivalent of leaving lock - the transaction will play back all modifications to verify that they are still consistent. If no other thread modified same area of memory, the lock exists as it normally would under traditional synchronization. Should however conflict be determined, the second or subsequent transaction trying to access same memory region will be rolled back to be retried at later time.

From the description it is clearly evident that if your threads update handful of values in vast arrays in single atomic operation, likelyhood of ever having to pay time penalty for memory rollback will be very small even with many cores running at the same time.

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